Automatic Design of Synchronous Sequential Logic Circuit Using Genetic Algorithm

Abstract

The design of synchronous sequential logic circuits is of great interest to a number of researchers and designers, and there are many different researches dealing with this subject.
This paper deals with the design of synchronous sequential logic circuits using Genetic Algorithms (GA). GAs is search algorithms based on the mechanism of natural selection and natural genetics and use natural genetics operators such as crossover and mutation.
The design of synchronous sequential logic circuits starts from a set of specification or a list of Boolean functions from which a logic design can be obtained. The first step in the design of sequential circuit is to obtain state table or an equivalence representation, such as state diagram.
In this work GAs are used to design synchronous sequential logic circuit with minimum number of gates. A population of candidates is maintained, and goes through a series of generations. For each new generation, some of the existing candidates survive, while others are created by types of reproduction and mutation from a set of parents.
The input to this work is the user requirement which is represented as circuit specification which we need to design. GA takes this specification and applies genetic operation to it to construct state assignment.
The circuit is represented in such a way that the genetic operations can be carried out. The architecture of the circuits design has three stages. In stage one; the circuit specification is represented using State Transition Table (STT). In stage two; genetic algorithm uses STT to generate state assignment to assign binary code for each state. The third stage gives the minimum circuit using tabulation method. Different counters circuits have been selected and applied to show the result of GA.